1. Field of the Invention
The present invention relates to a die bonding apparatus for performing die bonding which is one of stages in a semiconductor manufacturing process.
2. Description of the Prior Art
In a conventional die bonding apparatus, map information (information expressing positions of all chips and their quality) is first made based upon a quality check (the first test) of a wafer before divided into chips. In accordance with the resultant map information, the chips having the identical standing in quality together are fixed to a lead frame by die bonding.
However, such a conventional die bonding apparatus has disadvantages as mentioned below.
For example, lead frames used in a conventional die bonding are not marked with identification numbers, marks or the like; and so, it is impossible to know which standing of chips were die-bonded and to which lead frame they were die-bonded. Then, information useful in the first test, such as the type of the used apparatus, test data, standings in quality and the like, becomes useless when the die bonding is completed; that is, the information used in the first test cannot be effectively employed at the latter stages in the process.